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Test Analysis Division

TEST ANALYSIS DIVISION

Latch-up

Latch-up is a bad mechanism in which a parasitic thyristor (ex, a parasitic silicon controlled rectifier or SCR) is built into the circuit and continues to leak a lot of current when in a "turn on" state. According to the circuit, this mechanism can carry a very large amount of current and can cause critical damage with Electrical Overstress (EOS).

Charged Device Model(CDM)

This test considered to be the closest mechanism to field defect. The test sequence is to charge the package and discharge it. The CDM classification level is 200V to 1000V.

Reference Documents

Stress Ref. Abbv. Conditions
Latch-up Test JESD22-78 Latch-up TA = 25 °C

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